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Si5040
Register 205. TxPDGainAcq
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
Type
TxPDGainAcq[2:0]
R/W
Reserved
R/W
Reset settings = 1000 1101
Bit
7:5
4:0
Name
TxPDGainAcq[2:0]
Reserved
Function
TX phase detector gain during acquisition. Note that these bits require a one time
write of 000b after a power-up or a software reset.
Reserved; must only write 01101b to these bits.
Register 226. TxLoopFAcq
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
Type
TxLoopFAcqCtl
R/W
TxLoopFAcq[6:0]
R/W
Reset settings = 0001 1110
Bit
7
6:0
Name
TxLoopFAcqCtl
TxLoopFAcq[6:0]
Function
TX Acquistion Loop Filter Override.
1 = Use value written in Bit [6:0]. Set to 1 only when TX LOL is asserted.
0 = Use internally generated value. Set to 0 when TX LOL is deasserted.
TX Loop Filter Setting for Acquisition.
TX Loop filter override setting to be used during acquisiton. Set to 001 1000b
when TX LOL is asserted and to 000 0000 when TX LOL is deasserted. Note that
any read back may not return the last written value.
Rev. 1.3
99
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